Swapnil Thikane
HOD and Associate Professor, Mechanical Engineering
Verified by IMPARC
Dr. Deepak Kumar Jarwal
Assistant Professor, Electronics Engineering · Pandit Deendayal Energy University (PDEU), Gandhinagar · Gandhinagar
IMPARC ID IMP-MM-ENGG-GJ-IN-2026-2552
Member since 2026
Expertise
- Industrial Robotic Integration
- Biosensors
- Electronics Engineering
- Microelectronics
- Nanotechnology & Nanomaterials
- Optoelectronics
- Quantum Statistics
- Semiconductors
- Systems Integration
- Optics
- Device Fabrication
- Process Design
Mentorship offered
- Operations Consulting
- Regulatory Consulting
- Scientific and Technical Consulting
- Quality Assurance & Control (QA/QC)
- Product Evaluation
- Reverse Engineering
- Concept Development
- Scientific and Technical Research
- User Research
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About
Dr. Deepak Kumar Jarwal is a semiconductor device and process professional with a Ph.D. in Microelectronics and more than five years of post-Ph.D. experience in semiconductor fabrication, process development, device characterization, advanced packaging, thin-film technology and device simulation. His expertise includes semiconductor devices, sensors, detectors, optoelectronics, nanomaterials, solar cells, VLSI, wafer fabrication, TCAD and advanced semiconductor packaging. He has authored more than 24 SCI-indexed journal papers, contributed to international conference proceedings, holds four patents, and has significant academic, research, training and industry-oriented experience.
Publications 7
Journal articles
- D. K. Jarwal et al. (2024). High-Performance Ultrafast Photodetector Using CsPbBr3 Perovskite Single Crystal. Sensors and Actuators A: Physical.Web of Science (SCI / SCIE / SSCI / ESCI)
- D. K. Jarwal et al. (2022). Performance Optimization of ZnO Nanorods ETL-Based Hybrid Perovskite Solar Cells. IEEE Transactions on Electron Devices.Web of Science (SCI / SCIE / SSCI / ESCI)
- D. K. Jarwal et al. (2020). Fabrication and TCAD Simulation of TiO2 Nanorods ETL-Based Perovskite Solar Cells. Superlattices and Microstructures.Web of Science (SCI / SCIE / SSCI / ESCI)
- D. K. Jarwal et al. (2020). CuO Nanowire-Based Extended-Gate FET for Enzyme-Free Glucose Sensin. IEEE Sensors Journal.Web of Science (SCI / SCIE / SSCI / ESCI)
- D. K. Jarwal et al. (2023). CVD-Derived 2D Materials for Room-Temperature Gas Sensors. Journal of Materials Chemistry C.Web of Science (SCI / SCIE / SSCI / ESCI)
Book chapters
- (2022). Quantum Dots and Polymer Nanocomposites: Synthesis, Chemistry and Applications.. CRC Press, Taylor & Francis Group.
Conference papers
- (2019). Best Paper Award. IEEE IMaRC.
Experience
-
Assistant Professor (L-11) / Research Faculty – Semiconductor & Advanced Packaging
Pandit Deendayal Energy University (PDEU), Gandhinagar
July 2022 - Present (current)
-
Post-Doctoral Researcher
DRDO – Defence Laboratory, Jodhpur
December 2021 - June 2022
-
Project Fellow
NIT Hamirpur
April 2021 - December 2021
-
Ph.D. Research Scholar
IIT (BHU), Varanasi
July 2015 - July 2020
Education
-
2021
Ph.D., Microelectronics
IIT (BHU), Varanasi
-
2015
M.Tech., Digital Communication Engineering
IIIT Gwalior
-
2011
B.Tech., Electronics & Communication Engineering
Government Engineering College, Jhalawar
Supervision & projects
- Ongoing
Thesis · Multiple semiconductor/VLSI capstone projects
- Ongoing
Funded project · Energy-Efficient Smart Computing: Python-Driven FPGA–GPU P-bit Framework for Large-Scale Combinatorial Optimization
Student Research Program (SRP), PDEU · Project Lead / Student Research Guide · April 2026 - Present
Awards
-
CSIR Junior Research Fellowship
CSIR · 2013
-
UGC-NET-JRF
UGC · 2014
-
Visvesvaraya Ph.D. Fellowship
MeitY, Government of India
-
Best Paper Award
IEEE IMaRC · 2019
Events & training
-
Micron–Government of Gujarat Semiconductor Skill Facility / PDEU · Micron–Government of Gujarat Semiconductor Skill Facility / PDEU
Advanced Semiconductor Packaging (ATMP)
- 1-12 July 2024
Industrial Training · e-infochip, Ahmedabad
Advances in VLSI System Design
- 1-5 June 2021
Faculty Development Programme · ATAL–AICTE
Recent Advances and Challenges in Nanoscale Devices: Design, Materials and Applications
- 24-28 April 2017
Hands-on Training Workshop · IIT Bombay, INUP
Fabrication & Characterization of Crystalline Silicon Solar Cells
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